The present invention relates to wafer processing apparatus, to wafer carriers for use in such processing apparatus, and to methods of wafer processing.
Many semiconductor devices are formed by processes performed on a substrate. The substrate typically is slab of a crystalline material, commonly referred to as a “wafer.” Typically, the wafer is formed from a crystalline material, and is in the form of a disc. One common process is epitaxial growth. For example, devices formed from compound semiconductors such as III-V semiconductors typically are formed by growing successive layers of the compound semiconductor using metal organic chemical vapor deposition or “MOCVD.” In this process, the wafers are exposed to a combination of gases, typically including a metal organic compound as a source of a group III metal, and also including a source of a group V element, which flow over the surface of the wafer while the wafer is maintained at an elevated temperature. Typically, the metal organic compound and group V source are combined with a carrier gas which does not participate appreciably in the reaction as, for example, nitrogen. One example of a III-V semiconductor is gallium nitride, which can be formed by reaction of an organo gallium compound and ammonia on a substrate having a suitable crystal lattice spacing, as, for example, a sapphire wafer. Typically, the wafer is maintained at a temperature on the order of 1000-1100° C. during deposition of gallium nitride and related compounds.
Composite devices can be fabricated by depositing numerous layers in succession on the surface of the wafer under slightly different reaction conditions, as, for example, additions of other group III or group V elements to vary the crystal structure and bandgap of the semiconductor. For example, in a gallium nitride based semiconductor, indium, aluminum or both can be used in varying proportion to vary the bandgap of the semiconductor. Also, p-type or n-type dopants can be added to control the conductivity of each layer. After all of the semiconductor layers have been formed and, typically, after appropriate electric contacts have been applied, the wafer is cut into individual devices. Devices such as light-emitting diodes (“LEDs”), lasers, and other optoelectronic devices can be fabricated in this way.
In a typical chemical vapor deposition process, numerous wafers are held on a device commonly referred to as a wafer carrier so that a top surface of each wafer is exposed at the top surface of the wafer carrier. The wafer carrier is then placed into a reaction chamber and maintained at the desired temperature while the gas mixture flows over the surface of the wafer carrier. It is important to maintain uniform conditions at all points on the top surfaces of the various wafers on the carrier during the process. Variations in process conditions can cause undesired variations in the properties of the resulting semiconductor device. For example, variations in the rate of deposition can cause variations in thickness of the deposited layers, which in turn can lead to non-uniform characteristics in the resulting devices. Thus, considerable effort has been devoted in the art heretofore towards maintaining uniform conditions.
One type of CVD apparatus which has been widely accepted in the industry uses a wafer carrier in the form of a large disc with numerous wafer-holding regions, each adapted to hold one wafer. The wafer carrier is supported on a spindle within the reaction chamber so that the top surface of the wafer carrier having the exposed surfaces of the wafers faces upwardly toward a gas distribution element. While the spindle is rotated, the gas is directed downwardly onto the top surface of the wafer carrier and flows across the top surface toward the periphery of the wafer carrier. The outwardly-flowing gas forms a boundary layer covering the top surface of the wafer carrier. The used gas flows downwardly around the periphery of the wafer and is evacuated from the reaction chamber through ports disposed below the wafer carrier. The wafer carrier is maintained at the desired elevated temperature by heating elements, typically electrical resistive heating elements disposed below the bottom surface of the wafer carrier.
The rate of certain treatment processes, such as the growth rate in an MOCVD process under mass-transport-limited growth conditions, is inversely related to the boundary layer thickness. For the case of an infinitely large carrier, theory predicts that the rate is inversely proportional to the boundary layer thickness. This means that for thinner boundary layers the growth rate is higher. This reflects the fact that, as the boundary layer becomes thinner, it takes less time for reactive moieties to diffuse through the boundary layer to the surface of the wafer carrier and the surfaces of the wafers. Hence, a thin and uniform diffusion boundary layer is desirable to achieve uniform and fast deposition rate during the MOCVD epitaxial growth. Boundary layer thickness can be controlled by changing the rotation rate and pressure in reactor and is inversely proportional of the square root of those two parameters. It can also be controlled by changing the dynamic viscosity of the gas mixture. The dynamic viscosity is a function of fraction of different gases in the mixture as well as of carrier and inlet temperature.
Typically, with stable flow conditions in the reactor and with substantially uniform heating of the wafer carrier, uniform boundary layer thickness can be achieved above the majority of the wafer carrier surface. However, near the periphery of the wafer carrier, the gas flow begins to change direction from radial above the wafer carrier to the downward flow which carries the gas from the wafer carrier to the exhaust. In the edge region of the wafer carrier near the periphery, the boundary layer becomes thinner and hence the process rate increases appreciably. For example, if a wafer is positioned on the carrier with a portion of the wafer disposed in the edge region, a chemical vapor deposition process will form layers of uneven thickness. Thicker portions will be formed on those parts of the wafer disposed in the edge region.
To avoid this problem, wafers are not positioned in the edge region. Thus, the pockets or other wafer-holding features of wafer carriers typically are provided only in the area of the wafer carrier remote from the periphery. This limits the number and size of wafers which can be accommodated on a carrier of a given size, and therefore limits the productivity of the equipment and process. Although a larger wafer carrier could accommodate more wafers, larger carriers have significant drawbacks. Larger carriers are more expensive, heavier and thus more difficult to handle, particularly during movement of the carrier into and out of the reaction chamber. Moreover, it typically is impractical to increase the size of the wafer carriers used in existing processing equipment.
Thus, although considerable effort has been devoted in the art heretofore to design an optimization of such systems, still further improvement would be desirable.